The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2020

Filed:

Dec. 29, 2017
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Eun Kyu In, Gyeonggi-do, KR;

Jae Woo Park, Gyeonggi-do, KR;

Seok Won Park, Seoul, KR;

Byung Ryul Kim, Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/08 (2006.01); G11C 16/04 (2006.01); G11C 16/32 (2006.01); G11C 8/18 (2006.01); G11C 16/24 (2006.01);
U.S. Cl.
CPC ...
G11C 16/08 (2013.01); G11C 16/0408 (2013.01); G11C 8/18 (2013.01); G11C 16/0483 (2013.01); G11C 16/24 (2013.01); G11C 16/32 (2013.01);
Abstract

A memory device prevents generation of an abnormal column address. The memory device includes: a memory cell array; and a column address controller configured to generate a column address of the memory cell array in response to a column address control signal, wherein the column address controller enables the column address control signal when an address signal is input, and wherein the address signal includes a column address signal corresponding to the column address.


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