The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2020

Filed:

May. 03, 2018
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Vinod Sasidharan, Bangalore, IN;

Rishabh Mahajan, Delhi, IN;

Abhishek Mourya, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); G06F 3/06 (2006.01); G06F 9/4401 (2018.01);
U.S. Cl.
CPC ...
G06F 11/0778 (2013.01); G06F 3/0619 (2013.01); G06F 3/0665 (2013.01); G06F 3/0679 (2013.01); G06F 9/4401 (2013.01); G06F 11/079 (2013.01); G06F 11/0787 (2013.01); G06F 2213/0026 (2013.01);
Abstract

The present disclosure describes technologies and techniques for use by a data storage controller—such as a controller for use with a NAND or other non-volatile memory (NVM)—to store crash-dump information in a boot partition following a system crash within the data storage controller. Within illustrative examples described herein, the boot partition may be read by a host device without the host first re-installing valid firmware into the data storage controller following the system crash. In the illustrative examples, the data storage controller is configured for use with versions of Peripheral Component Interconnect (PCI) Express—Non-Volatile Memory express (NVMe) that provide support for boot partitions in the NVM. The illustrative examples additionally describe virtual boot partitions in random access memory (RAM) for storing crash-dump information if the NAND has been corrupted, where the crash-dump information is retrieved from the RAM without power-cycling the RAM.


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