The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2020

Filed:

Dec. 20, 2017
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Douglas Benson Hunt, Fort Collins, CO (US);

Jay Fleischman, Fort Collins, CO (US);

Assignee:

ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2018.01); H04L 12/26 (2006.01); G06F 11/30 (2006.01); G06F 11/34 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
H04L 43/0852 (2013.01); G06F 9/5011 (2013.01); G06F 11/3024 (2013.01); G06F 11/348 (2013.01); G06F 11/3433 (2013.01); G06F 9/5027 (2013.01); G06F 2201/88 (2013.01); G06F 2212/60 (2013.01); G06F 2212/62 (2013.01);
Abstract

A system includes a multi-core processor that includes a scheduler. The multi-core processor communicates with a system memory and an operating system. The multi-core processor executes a first process and a second process. The system uses the scheduler to control a use of a memory bandwidth by the second process until a current use in a control cycle by the first process meets a first setpoint of use for the first process when the first setpoint is at or below a latency sensitive (LS) floor or a current use in the control cycle by the first process exceeds the LS floor when the first setpoint exceeds the LS floor.


Find Patent Forward Citations

Loading…