Double-integrated silicon control rectifier transistor and related methods

Abstract

The disclosed embodiments include an ESD robust transistor with a compound-SCR protection. The transistor may include a semiconductor substrate having a first conductivity type, a drain region coupled with the semiconductor substrate having a drain SCR component with a first drain region of the first conductivity type and a second drain region of the second conductivity type. The transistor may also include a source coupled with the semiconductor substrate, a channel region of the second conductivity type, and a gate coupled with the channel region having SCR components with a first gate region of the first conductivity type and a second gate region of the second conductivity type. The drain SCR components and the gate SCR components may create a low resistance discharge path along the channel region that activates in response to the ESD such that the ESD discharges through the transistor without causing damage to the transistor.