The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2020

Filed:

Aug. 25, 2017
Applicant:

Raytheon Company, Waltham, MA (US);

Inventors:

Daniel Thompson, Waltham, MA (US);

Harry B. Marr, Waltham, MA (US);

Ian Robinson, Waltham, MA (US);

Jeffrey Caldwell, Waltham, MA (US);

Assignee:

Raytheon Company, Waltham, MA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01S 7/03 (2006.01); H01Q 3/26 (2006.01); G01S 7/40 (2006.01); G01S 13/02 (2006.01);
U.S. Cl.
CPC ...
G01S 7/032 (2013.01); G01S 7/4026 (2013.01); G01S 13/0209 (2013.01); H01Q 3/2605 (2013.01); G01S 2013/0254 (2013.01); H01Q 3/2682 (2013.01);
Abstract

A system and method of digital beamforming for a monobit phased array radar system includes providing a plurality of monobit analog signals received by at least one antenna to at least one field programmable gate array (FPGA). A plurality of monobit SerDes transceivers within the FPGA convert the plurality of monobit analog signals into a plurality of multibit digital signals, each of the multibit digital signals being modified according to a digital signal conditioning value to calibrate, phase align, and synchronize the digital signals. A digital beam is formed by coherently combining the plurality of digital signals within the FPGA.


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