The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2020

Filed:

Nov. 23, 2016
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Dae-Young Chung, Seoul, KR;

Jae-Jin Park, Seongnam-si, KR;

Dong-Hyuk Lim, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 19/00 (2006.01); G01R 23/02 (2006.01); H03D 3/00 (2006.01); H03F 3/45 (2006.01); H03D 7/12 (2006.01); H03F 3/04 (2006.01); H03K 5/02 (2006.01);
U.S. Cl.
CPC ...
G01R 23/02 (2013.01); G01R 19/0007 (2013.01); H03D 3/007 (2013.01); H03D 7/12 (2013.01); H03F 3/04 (2013.01); H03F 3/45475 (2013.01); H03K 5/02 (2013.01); H03F 2200/165 (2013.01); H03F 2200/261 (2013.01); H03F 2200/294 (2013.01);
Abstract

A lock-in amplifier includes a clock signal generator configured to generate a first demodulation clock signal and a second demodulation clock signal having a phase difference of 90 degrees and a same demodulation frequency; and a detector configured to, based on an input signal, the first demodulation clock signal, and the second demodulation clock signal, provide an offset voltage corresponding to an offset of the lock-in amplifier in a first operation mode, and provide a first output voltage and a second output voltage, each of which correspond to a demodulation frequency component of the input signal in a second operation mode.


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