The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2020
Filed:
Sep. 24, 2018
Advanced Micro Devices, Inc., Santa Clara, CA (US);
Milam Paraschou, Dellwood, MN (US);
Balwinder Singh, Union City, CA (US);
Gerald R. Talbot, Concord, MA (US);
Alushulla Jack Ambundo, Austin, TX (US);
Edoardo Prete, Arlington, MA (US);
Thomas H. Likens, III, Austin, TX (US);
Michael A. Margules, Austin, TX (US);
Advanced Micro Devices, Inc., Santa Clara, CA (US);
Abstract
Systems, apparatuses, and methods for performing efficient data transfer in a computing system are disclosed. A termination voltage generator includes an inverter-based chopper circuit, which uses a first group of an even number of serially connected inverters coupled between the output node of the chopper circuit and the gate terminal of an output pmos transistor. Additionally, a second group of an even number of serially connected inverters is coupled between the output node and the gate terminal of an output nmos transistor. A replica inverter includes two serially connected pmos transistors and two serially connected nmos transistors. Each of one pmos transistor and one nmos transistor receives a generated voltage set as the expected value of the termination voltage. Each of the other pmos transistor and nmos transistor receives an output based on a comparison between the expected value to the output of the replica inverter.