The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2020
Filed:
Jul. 19, 2016
Sony Semiconductor Solutions Corporation, Kanagawa, JP;
Toshiaki Shiraiwa, Kanagawa, JP;
Masaki Okamoto, Kanagawa, JP;
Hiroyasu Matsugai, Kanagawa, JP;
Hiroyuki Itou, Kanagawa, JP;
Suguru Saito, Kanagawa, JP;
Keiji Ohshima, Tokyo, JP;
Nobutoshi Fujii, Kanagawa, JP;
Hiroshi Tazawa, Kanagawa, JP;
Minoru Ishida, Tokyo, JP;
Sony Semiconductor Solutions Corporation, Kanagawa, JP;
Abstract
Influence of chipping in case of dicing a plurality of stacked substrates is reduced. Provided is a semiconductor device where a substrate, in which a groove surrounding a pattern configured with a predetermined circuit or part is formed, is stacked. The present technology can be applied to, for example, a stacked lens structure where through-holes are formed in each substrate and lenses are disposed in inner sides of the through-holes, a camera module where a stacked lens structure and a light-receiving device are incorporated, a solid-state imaging device where a pixel substrate and a control substrate are stacked, and the like.