The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10686323 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 16, 2020

Filed:

Aug. 29, 2017
Applicant:

Sii Semiconductor Corporation, Chiba-shi, Chiba, JP;

Inventors:

Atsushi Sakurai, Chiba, JP;

Takashi Ono, Chiba, JP;

Assignee:

ABLIC INC., Chiba, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 7/00 (2006.01); H02J 7/34 (2006.01);
U.S. Cl.
CPC ...
H02J 7/007184 (2020.01); H02J 7/0029 (2013.01); H02J 7/0068 (2013.01); H02J 7/342 (2020.01); H02J 7/007 (2013.01); H02J 7/0031 (2013.01); H02J 7/0032 (2013.01); H02J 7/0036 (2013.01); H02J 7/00302 (2020.01); H02J 7/00304 (2020.01); H02J 7/00306 (2020.01); H02J 7/00308 (2020.01); H02J 7/00309 (2020.01); H02J 7/00712 (2020.01); H02J 7/007182 (2020.01); H02J 7/007186 (2020.01); H02J 7/007194 (2020.01);
Abstract

Provided are a charge/discharge control circuit capable of using an FET having a low withstand voltage. The charge/discharge control circuit is configured to control charging and discharging of a secondary cell, and includes: a positive power supply terminal and a negative power supply terminal for monitoring a voltage of the secondary cell; a charge control terminal configured to connect to a gate of a charge control FET, the charge control FET having one end connected to an external negative terminal to which a negative electrode of a load or a charger is connected; and a clamp circuit configured to clamp a signal at a high level for turning on the charge control FET to a voltage that is higher than a reference voltage by a predetermined voltage, the reference voltage being a voltage at the external negative terminal, the signal being output to the charge control terminal.


Find Patent Forward Citations

Sakurai, Atsushi. (2020). Charge/discharge control circuit and battery device including the same (U.S. Patent No. 10686323). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10686323

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