The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2020

Filed:

Aug. 23, 2017
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Tatsuya Kato, Yokkaichi, JP;

Fumitaka Arai, Yokkaichi, JP;

Katsuyuki Sekine, Yokkaichi, JP;

Toshiyuki Iwamoto, Mie, JP;

Yuta Watanabe, Yokkaichi, JP;

Wataru Sakamoto, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 21/28 (2006.01); H01L 27/11524 (2017.01); H01L 27/11556 (2017.01); H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42324 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); H01L 29/40114 (2019.08); H01L 29/7883 (2013.01);
Abstract

A semiconductor memory device according to an embodiment, includes a pair of first electrodes, a semiconductor pillar, an inter-pillar insulating member, a first insulating film, a second electrode, and a second insulating film. The pair of first electrodes are separated from each other, and extend in a first direction. The semiconductor pillar and the inter-pillar insulating member are arranged alternately along the first direction between the pair of first electrodes. The semiconductor pillar and the inter-pillar insulating member extend in a second direction crossing the first direction. The first insulating film is provided at a periphery of the semiconductor pillar. The second electrode is provided between the first insulating film and each electrode of the pair of first electrodes. The second electrode is not provided between the semiconductor pillar and the inter-pillar insulating member. The second insulating film is provided between the second electrode and the first electrode.


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