The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2020

Filed:

Dec. 24, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;

Inventors:

Jongwon Kim, Hwaseong-si, KR;

Hyeong Park, Hwaseong-si, KR;

Hyunmin Lee, Seoul, KR;

Hojong Kang, Cheongju-si, KR;

Joowon Park, Seoul, KR;

Seungmin Song, Seoul, KR;

Assignee:

SAMSUNG ELECTRONICS CO., .LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 27/11565 (2017.01); H01L 27/11575 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 27/11565 (2013.01); H01L 27/11575 (2013.01);
Abstract

A semiconductor memory device includes a stack structure including gate electrodes vertically stacked on a substrate and a vertical channel part penetrating the gate electrodes, a bit line connected to the vertical channel part, and a plurality of conductive lines connected to the gate electrodes on the stack structure. The conductive lines form a plurality of stacked layers and include first conductive lines and second conductive lines. The number of the first conductive lines disposed at a first level from the substrate is different from the number of the second conductive lines disposed at a second level from the substrate. The first level is different from the second level.


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