The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2020

Filed:

Jul. 24, 2018
Applicant:

Dell Products, L.p., Round Rock, TX (US);

Inventors:

Stuart A. Berke, Austin, TX (US);

Vadhiraj Sankaranarayanan, Austin, TX (US);

Bhyrav M. Mutnury, Austin, TX (US);

Assignee:

Dell Products, L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/22 (2006.01); G11C 29/42 (2006.01); G11C 29/06 (2006.01); G06F 11/10 (2006.01); G11C 29/04 (2006.01); G11C 29/12 (2006.01);
U.S. Cl.
CPC ...
G11C 29/846 (2013.01); G06F 11/1016 (2013.01); G06F 11/1044 (2013.01); G06F 11/221 (2013.01); G11C 29/06 (2013.01); G11C 29/42 (2013.01); G11C 2029/0407 (2013.01); G11C 2029/1204 (2013.01);
Abstract

A memory subsystem includes one or more communication channels that enable communication with more than one memory module of an information handling system (IHS). A memory controller of the memory subsystem is in communication with the one or more communication channels. In response to determining that one or more lines fail signal integrity testing at a target communication speed, the memory controller invokes an error checking and correcting (ECC) mode that reassigns lines of the communication channel for carrying data and ECC code. Lines that passed signal integrity testing are assigned to carrying data and ECC code. Lines that failed signal integrity testing are not used.


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