The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2020

Filed:

May. 23, 2019
Applicant:

Phison Electronics Corp., Miaoli, TW;

Inventors:

Ping-Chuan Lin, Taipei, TW;

Shii-Yeu Chern, Taipei, TW;

Hsiang-Jui Huang, New Taipei, TW;

Ping-Yu Hsieh, Tainan, TW;

Zih-Jia Wang, Taoyuan, TW;

Yun-You Lin, Kaohsiung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/18 (2006.01); G06F 3/06 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 29/76 (2013.01); G06F 3/0619 (2013.01); G06F 3/0638 (2013.01); G06F 3/0679 (2013.01); G06F 11/181 (2013.01); G11C 16/349 (2013.01);
Abstract

The invention provides a memory management method, a memory storage device, and a memory control circuit unit. The method includes: recording an error bit number of each upper physical programming unit and an error bit number of each lower physical programming unit of each of the physical erasing units; determining whether a first physical erasing unit is a bad physical erasing unit according to distributions of the error bit numbers of the upper physical programming units and the lower physical programming units of the first physical erasing unit of the physical erasing units; and performing a data transfer operation on data in the first physical erasing unit if the first physical erasing unit is determined as the bad physical erasing unit.


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