The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2020

Filed:

Oct. 10, 2018
Applicant:

Integrated Device Technology, Inc., San Jose, CA (US);

Inventors:

Steven Ernest Finn, Chamblee, GA (US);

Mohammed Amir Khan, Duluth, GA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 11/4076 (2006.01); H03K 5/133 (2014.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); H03K 5/133 (2013.01); H03K 2005/00058 (2013.01); H03K 2005/00286 (2013.01);
Abstract

An apparatus includes a plurality of coarse delay circuits and a phase blender circuit. The coarse delay circuits may be configured to (i) receive an input clock signal, (ii) receive a plurality of control signals and (iii) generate a first phase signal and a second phase signal. The phase blender circuit may be configured to (i) receive the first phase signal and the second phase signal, (ii) receive a phase control signal, (iii) step between stages implemented by the coarse delay circuits and (iv) present an output clock signal. The phase blender circuit may mitigate a mismatch between the stages of the coarse delay circuits by interpolating an amount of coarse delay provided by the coarse delay circuits.


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