The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2020

Filed:

Oct. 31, 2017
Applicants:

Dialog Semiconductor (Uk) Limited, London, GB;

Dialog Semiconductor Inc., Campbell, CA (US);

Inventors:

Jung Woo Choi, Pleasanton, CA (US);

John Kesterson, Seaside, CA (US);

Gary Hague, Swindon, GB;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 11/412 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 7/109 (2013.01); G11C 7/1087 (2013.01); G11C 11/412 (2013.01); G11C 11/419 (2013.01);
Abstract

A memory element is provided in which a logical state can be securely stored in all conditions even when input set and reset signals are overlapping. This is achieved through provision of an array of persistence latches with an asynchronous circuit that ensures correct operation. The persistence latches provide a persistent output for each of the first and second edges of each input. The memory element is arranged to receive a plurality of inputs including a first and second input. Each first and second inputs include a digital signal that can transition between a first state via a first edge which triggers transition from the first state to the second state and a second edge which triggers transition from the second state to the first state.


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