The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2020

Filed:

Feb. 11, 2019
Applicant:

Google Llc, Mountain View, CA (US);

Inventors:

Albert Meixner, Mountain View, CA (US);

Hyunchul Park, Santa Clara, CA (US);

Qiuling Zhu, San Jose, CA (US);

Jason Rupert Redgrave, Mountain View, CA (US);

Assignee:

Google LLC, Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G06T 1/60 (2006.01); G06F 9/38 (2018.01); G06T 1/20 (2006.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06T 1/60 (2013.01); G06F 9/30032 (2013.01); G06F 9/30036 (2013.01); G06F 9/30043 (2013.01); G06F 9/30134 (2013.01); G06F 9/30138 (2013.01); G06F 9/3887 (2013.01); G06T 1/20 (2013.01);
Abstract

A method is described. The method includes repeatedly loading a next sheet of image data from a first location of a memory into a two dimensional shift register array. The memory is locally coupled to the two-dimensional shift register array and an execution lane array having a smaller dimension than the two-dimensional shift register array along at least one array axis. The loaded next sheet of image data keeps within an image area of the two-dimensional shift register array. The method also includes repeatedly determining output values for the next sheet of image data through execution of program code instructions along respective lanes of the execution lane array, wherein, a stencil size used in determining the output values encompasses only pixels that reside within the two-dimensional shift register array.


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