The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2020

Filed:

Oct. 31, 2016
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Costas Bekas, Zurich, CH;

Alessandro Curioni, Gattikon, CH;

Heiner Giefers, Langnau am Albis, CH;

Christoph Hagleitner, Wallisellen, CH;

Raphael C. Polig, Dietikon, CH;

Peter W. J. Staar, Zurich, CH;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/16 (2006.01);
U.S. Cl.
CPC ...
G06F 17/16 (2013.01);
Abstract

According to some embodiments, a computer-implemented method for performing sparse matrix dense matrix (SpMM) multiplication on a single field programmable gate array (FPGA) module comprising a k-stage pipeline is described. The method may include interleaving k-stage threads on the k-stage pipeline comprising a plurality of threads tto t, wherein a first result of thread tis ready one cycle after the first input of thread tis fed into the pipeline, and outputting a result matrix Y.


Find Patent Forward Citations

Bekas, Costas. (2020). Sparse matrix multiplication using a single field programmable gate array module (U.S. Patent No. 10685082). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10685082

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…