The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2020

Filed:

Jan. 14, 2019
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Rubin Ajit Parekhji, Bangalore, IN;

Mahesh M. Mehendale, Bangalore, IN;

Vinod Menezes, Bangalore, IN;

Vipul K. Singhal, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2020.01); G01R 31/28 (2006.01); G01R 31/3185 (2006.01); G01R 1/04 (2006.01); G01R 1/067 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2834 (2013.01); G01R 1/0416 (2013.01); G01R 1/06711 (2013.01); G01R 31/2886 (2013.01); G01R 31/318511 (2013.01);
Abstract

In a method of testing a semiconductor wafer including a scribe line and multiple dies, the method includes implementing a first landing pad on the scribe line, and implementing a first interconnect on the scribe line and between the first landing pad and a first cluster of the dies, thereby coupling the first landing pad to the first cluster of dies. The method also includes performing the testing of the first cluster of dies using automated test equipment (ATE) coupled to a probe tip by contacting the first landing pad with the probe tip, and applying an ATE resource to the first cluster of dies.


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