The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2020

Filed:

Sep. 24, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;

Inventors:

Seok-Ho Shin, Seoul, KR;

Bonhwi Gu, Seoul, KR;

Hyekyeong Kweon, Seoul, KR;

Sungjin Kim, Seoul, KR;

Joodong Kim, Hwaseong-si, KR;

Jaepil Lee, Seoul, KR;

Dongwon Lim, Seoul, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 21/66 (2006.01); H01L 23/522 (2006.01); H01L 23/535 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 24/09 (2013.01); H01L 22/32 (2013.01); H01L 22/34 (2013.01); H01L 23/5226 (2013.01); H01L 23/535 (2013.01); H01L 23/53295 (2013.01); H01L 24/05 (2013.01); H01L 24/06 (2013.01); H01L 2224/02166 (2013.01); H01L 2224/02375 (2013.01); H01L 2224/05 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/06135 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/14 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate having a chip region and an edge region, a plurality of connection structures provided in a lower insulating layer of the edge region and arranged at first intervals in a first direction, an upper insulating layer covering the connection structures, and a plurality of redistribution pads disposed on the upper insulating layer and connected to the connection structures, respectively. Each of the redistribution pads includes a pad portion provided on the chip region. The pad portions of the redistribution pads are spaced apart from the connection structures by a first distance in a second direction intersecting the first direction when viewed in a plan view.


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