The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2020

Filed:

Feb. 25, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Manuel Le Gallo, Zurich, CH;

Abu Sebastian, Adliswil, CH;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/16 (2006.01); G11C 13/04 (2006.01); G11C 13/00 (2006.01); G11C 11/16 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G06F 17/16 (2013.01); G11C 11/16 (2013.01); G11C 11/56 (2013.01); G11C 11/5607 (2013.01); G11C 11/5614 (2013.01); G11C 11/5678 (2013.01); G11C 11/5685 (2013.01); G11C 13/0002 (2013.01); G11C 13/004 (2013.01); G11C 13/0004 (2013.01); G11C 13/0007 (2013.01); G11C 13/0011 (2013.01); G11C 13/0069 (2013.01); G11C 13/04 (2013.01); G11C 13/047 (2013.01);
Abstract

A device for performing a multiplication of a matrix with a vector. The device comprises a plurality of memory elements, a signal generator and a readout circuit. The signal generator is configured to apply programming signals to the memory elements. The signal generator is further configured to control a first signal parameter of the programming signals in dependence on matrix elements of the matrix and to control a second signal parameter of the programming signals in dependence on vector elements of the vector. The readout circuit is configured to read out memory values of the memory elements. The memory values represent result values of vector elements of a product vector of the multiplication. The memory elements may be in particular resistive memory elements or photonic memory elements. Additionally there is provided a related method and design structure for performing the multiplication of a matrix with a vector.


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