The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 2020
Filed:
Dec. 06, 2016
Applicant:
International Business Machines Corporation, Armonk, NY (US);
Inventors:
Stuart Z. Jacobs, Lakeville, MN (US);
David A. Larson, Rochester, MN (US);
Michael J. Vance, Rochester, MN (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/455 (2018.01); G06F 12/084 (2016.01); G06F 12/0842 (2016.01); G06F 12/0862 (2016.01); G06F 12/0875 (2016.01); G06F 13/24 (2006.01);
U.S. Cl.
CPC ...
G06F 13/24 (2013.01); G06F 9/30054 (2013.01); G06F 9/45558 (2013.01); G06F 12/084 (2013.01); G06F 12/0842 (2013.01); G06F 12/0862 (2013.01); G06F 12/0875 (2013.01); G06F 2009/45579 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/152 (2013.01); G06F 2212/2022 (2013.01); G06F 2212/2024 (2013.01); G06F 2212/452 (2013.01);
Abstract
Systems, methods, and computer program products to perform an operation comprising processing a first logical partition on a shared processor for the duration of a dispatch cycle, issuing, by a hypervisor, at a predefined time prior to completion of the dispatch cycle, a lightweight hypervisor decrementer (HDEC) interrupt, and responsive to the lightweight HDEC interrupt, initiating an asynchronous hardware operation on the shared processor prior to completion of the dispatch cycle.