The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2020

Filed:

Jun. 18, 2018
Applicant:

Taiyo Yuden Co., Ltd., Tokyo, JP;

Inventors:

Yuichi Sugiyama, Tokyo, JP;

Masashi Miyazaki, Tokyo, JP;

Hiroyuki Kobayashi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 1/05 (2006.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01); H05K 3/00 (2006.01); H05K 3/44 (2006.01); H04N 5/225 (2006.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0271 (2013.01); H04N 5/2253 (2013.01); H04N 5/2258 (2013.01); H05K 1/02 (2013.01); H05K 1/05 (2013.01); H05K 1/111 (2013.01); H05K 1/181 (2013.01); H05K 3/00 (2013.01); H05K 3/0052 (2013.01); H05K 3/445 (2013.01); H01L 27/14618 (2013.01); H05K 2201/0347 (2013.01); H05K 2201/0358 (2013.01); H05K 2201/09054 (2013.01); H05K 2201/09136 (2013.01); H05K 2201/09227 (2013.01); H05K 2201/10121 (2013.01);
Abstract

A printed wiring board for camera module includes: first and second mounting regions for first and second image pickup devices respectively provided on one and the other sides in a front surface of the printed wiring board, the first and second mounting regions respectively provided with first and second conductive patterns configured to be electrically connected to the first and second image pickup devices, respectively, and a component mounting region provided between the first mounting region and the second mounting region, the component mounting region provided with a third conductive pattern, the third conductive pattern configured to be electrically connected to a signal processing component, amounting density of the third conductive pattern in the component mounting region being higher than that of the first conductive pattern in the first mounting region or a mounting density of the second conductive pattern in the second mounting region, in a plan view.


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