The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2020

Filed:

Aug. 02, 2017
Applicant:

Rohm Co., Ltd., Kyoto, JP;

Inventors:

Shingo Hashiguchi, Kyoto, JP;

Tetsuo Tateishi, Kyoto, JP;

Assignee:

Rohm Co., Ltd., Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/156 (2006.01); G01R 19/00 (2006.01); G05F 1/10 (2006.01); G06F 1/26 (2006.01); H02M 3/335 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 3/156 (2013.01); G01R 19/0092 (2013.01); G05F 1/10 (2013.01); G06F 1/26 (2013.01); H02M 3/33569 (2013.01); H02M 2001/0009 (2013.01); H02M 2001/0025 (2013.01); H03F 2200/351 (2013.01);
Abstract

A switching regulator control circuit, having: a slope circuitfor generating a slope voltage Von the basis of a clock signal CLK of a prescribed frequency; an error amplifierfor generating an error signal Vc corresponding to the difference between a reference voltage Vand a voltage Vcorresponding to the output voltage of a switching regulator; a comparatorfor comparing the error signal Vc and the slope voltage V; and an RS flip-flopset on the basis of the clock signal CLK and reset by a signal outputted by the comparator. The timing at which the RS flip-flopis set is delayed with respect to the timing at which the sloping of the slope voltage Vis started.


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