The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2020

Filed:

May. 18, 2018
Applicant:

Integra Technologies, Inc., El Segundo, CA (US);

Inventor:

William Veitschegger, Folsom, CA (US);

Assignee:

Integra Technologies, Inc., El Segundo, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/40 (2006.01); H01L 23/492 (2006.01); H01L 29/778 (2006.01); H01L 23/64 (2006.01); H01L 23/58 (2006.01); H01L 23/367 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 23/4952 (2013.01); H01L 23/367 (2013.01); H01L 23/40 (2013.01); H01L 23/492 (2013.01); H01L 23/585 (2013.01); H01L 23/64 (2013.01); H01L 29/778 (2013.01); H01L 23/49506 (2013.01); H01L 23/49861 (2013.01);
Abstract

A semiconductor power device including a base plate, a ring frame disposed over the base plate, a semiconductor power die disposed on the base plate and surrounded by the ring frame, an input lead by way the semiconductor power die receives an input signal, wherein the input lead is disposed over a first portion of the ring frame, and an output lead by way an output signal generated by the semiconductor power die is sent to another device, wherein the output lead is disposed over a second portion of the ring frame. The ring frame may be comprised of a relatively high thermal conductivity material, such as beryllium-oxide (Be), silicon-carbide (SiC), diamond, aluminum nitride (AlN), or others. The ring frame produces at least one more heat path between the active region of the semiconductor power die and the base plate so as to reduce the effective thermal impedance.


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