The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2020

Filed:

Sep. 12, 2017
Applicant:

Sharp Kabushiki Kaisha, Sakai, Osaka, JP;

Inventors:

Shinya Tanaka, Sakai, JP;

Taketoshi Nakano, Sakai, JP;

Asahi Yamato, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/10 (2006.01); G09G 3/3233 (2016.01); G01K 1/14 (2006.01); G01K 7/22 (2006.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01); G09G 3/3225 (2016.01); G09G 3/20 (2006.01); H01L 27/32 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3233 (2013.01); G01K 1/14 (2013.01); G01K 7/22 (2013.01); G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); G09G 3/20 (2013.01); G09G 3/3225 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0251 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0242 (2013.01); G09G 2320/041 (2013.01); G09G 2330/028 (2013.01); H01L 27/3276 (2013.01);
Abstract

An object of the disclosure is to achieve a stable display quality without an effect of variation in temperature in a display device including a display element driven by an electric current. The display device is provided with a thermistor as a temperature detector detecting an ambient temperature. A scanning signal amplitude controller changes the voltage level of a gate low voltage in accordance with temperature indicated by temperature data acquired by the thermistor. An in-panel driver controller gives, to a gate driver, a gate clock signal of which the voltage level on a high level side is set at the voltage level of a gate high voltage and the voltage level on a low level side is set at the voltage level of the gate low voltage. The gate driver outputs a scanning signal on the basis of the gate clock signal.


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