The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2020

Filed:

Dec. 10, 2018
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventor:

Padmanabham Patki, Santa Clara, CA (US);

Assignee:

Nvidia Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/75 (2013.01); H03K 19/003 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
G06F 21/75 (2013.01); H03K 19/003 (2013.01); H03K 19/20 (2013.01);
Abstract

Computing devices are now used for various purposes ranging from monitoring a refrigerator to driving automobiles. Protecting the data and logic within the chips of the computing devices is essential to ensure reliable operation. When a particular partition of a chip is powered-up but the logic of the partition is not reset, the logic will be in an unpredictable random state. To operate in a secure environment, it is necessary to start the operation of the logic from a known state and not a random state. To ensure the logic is operating in a secure environment, a digital reset detector circuit (DRDC) is provided that indicates if the logic was reset after power-up. The DRDC can ensure chips are secure from attacks involving reset deprivation upon power-up and help protect various secure and secret assets in a chip, including customer keys.


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