The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2020

Filed:

May. 30, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Hye Ju Kim, Namhae-gun, KR;

Hyo Bong Son, Hwaseong-si, KR;

Ml-Hyang Lee, Hwaseong-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G11C 11/56 (2006.01); G11C 16/04 (2006.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/0604 (2013.01); G06F 3/0623 (2013.01); G06F 3/0652 (2013.01); G06F 3/0679 (2013.01); G11C 11/5642 (2013.01); G11C 11/5671 (2013.01); G11C 16/0483 (2013.01); H01L 27/11582 (2013.01);
Abstract

A memory device, as provided herein, may include an invalidation bit circuit and a cell array. In methods for controlling such memory devices, the invalidation bit circuit may receive an invalid control command from a memory controller to update the invalid bit data to one of first and second states different from each other, the invalidation bit circuit may receive a read control command from the memory controller and may provide an invalid signal when the invalid bit data is in the first state, the invalidation bit circuit may transmit a data request when the invalid bit data is in the second state, and the cell array may receive the data request and provide data.


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