The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2020
Filed:
Jun. 27, 2016
Applicant:
Gsi Technology, Inc., Sunnyvale, CA (US);
Inventors:
Yu-Chi Cheng, Sunnyvale, CA (US);
Patrick Chuang, Sunnyvale, CA (US);
Assignee:
GSI TECHNOLOGY, INC., Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/081 (2006.01); H03K 5/156 (2006.01); G11C 7/22 (2006.01); G06F 1/10 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0812 (2013.01); G06F 1/10 (2013.01); G11C 7/222 (2013.01); H03K 5/1565 (2013.01);
Abstract
A system, method and circuits are described that pertain to locked loop circuits, distributed duty cycle correction loop circuitry. In some embodiments, the system and circuit may involve or be configured for coupling with lock loop circuitry such as phase locked loop (PLL) circuitry and/or a delay locked loop (DLL) circuitry. For example, one illustrative implementation may include or involve a phase locked loop (PLL) with distributed duty cycle correction loop/circuitry.