The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2020

Filed:

Mar. 13, 2015
Applicant:

Sony Corporation, Tokyo, JP;

Inventors:

Takashi Abe, Kanagawa, JP;

Nobutaka Shimamura, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/062 (2012.01); H01L 31/113 (2006.01); H01L 27/146 (2006.01); H04N 5/374 (2011.01);
U.S. Cl.
CPC ...
H01L 27/14603 (2013.01); H01L 27/1469 (2013.01); H01L 27/14612 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H01L 27/14643 (2013.01); H04N 5/3741 (2013.01);
Abstract

The present technology relates to a solid state imaging device capable of providing a solid state imaging device that does not cause deterioration of image quality due to an increase in reading speed of a pixel signal, and an imaging apparatus. In a pixel array block in which a plurality of pixels are two-dimensionally arrayed, each of the pixels including: a photoelectric conversion device; a plurality of transistors to be used for reading a signal from the photoelectric conversion device; and wiring for driving the transistors, a plurality of pixel output lines are provided for each one column of the plurality of pixels two-dimensionally arrayed, and the plurality of pixel output lines from the pixels are arranged separately in a plurality of wiring layers. The present technology can be applied to, for example, a CMOS image sensor.


Find Patent Forward Citations

Loading…