The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2020

Filed:

Jun. 19, 2018
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Hefei Xinsheng Optoelectronics Technology Co., Ltd., Hefei, Anhui, CN;

Inventors:

Miao Zhang, Beijing, CN;

Jing Sun, Beijing, CN;

Wuxia Fu, Beijing, CN;

Songmei Sun, Beijing, CN;

Fangqing Li, Beijing, CN;

Huanyu Li, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 19/00 (2006.01); G09G 3/20 (2006.01); G11C 19/28 (2006.01); G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
G09G 3/20 (2013.01); G11C 19/28 (2013.01); G09G 3/3677 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/061 (2013.01); G09G 2310/08 (2013.01); G09G 2330/06 (2013.01); G11C 19/287 (2013.01);
Abstract

The embodiments of the present disclosure provide a shift register, a method for driving the same, and a gate driving circuit. A pull-down sub-circuit of the shift register is under the control of a third clock signal terminal and a fourth clock signal terminal, wherein signals of the third clock signal terminal and the fourth clock signal terminal are mutually inverted signals, and signal periods of the third clock signal terminal and the fourth clock signal terminal are a half of a signal period of a first clock signal terminal or a second clock signal terminal.


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