The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2020
Filed:
Sep. 21, 2018
Xilinx, Inc., San Jose, CA (US);
Sing-Keng Tan, San Jose, CA (US);
Xiaobao Wang, Cupertino, CA (US);
Andrew Tabalujan, Milpitas, CA (US);
Gubo Huang, Milpitas, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
Examples of the present disclosure provide example devices that include an integrated circuit that has debugging capability. In some examples, a device includes an integrated circuit die. The integrated circuit die includes an input/output (IO) base cell and a debug port. The IO base cell has an interface node and a feedback node. The interface node is configured to be coupled to memory, such as via an interposer, for communication therebetween. The IO base cell is configurable to selectively output to the feedback node a signal that is on the interface node. The debug port has an input node and an output node. The input node is electrically connected to the feedback node. The debug port is configurable to selectively output to the output node a signal that is on the input node. The output node is configured to be coupled to a pin exterior to the integrated circuit die.