The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2020

Filed:

Jun. 06, 2019
Applicant:

Linear Technology Holding Llc, Wilmington, DE (US);

Inventor:

Gitesh Bhagwat, Santa Barbara, CA (US);

Assignee:

Linear Technology Holding LLC, Wilmington, DE (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04B 3/00 (2006.01); H04L 25/00 (2006.01); H04L 12/10 (2006.01); H01F 27/28 (2006.01); H02J 1/00 (2006.01);
U.S. Cl.
CPC ...
H04L 12/10 (2013.01); H01F 27/28 (2013.01); H02J 1/00 (2013.01);
Abstract

In a PoE system, DC power is transmitted over two wire pairs. The primary winding of an isolation transformer is connected across the differential I/O terminals of a first PHY (a transceiver). A positive voltage output of a power supply is connected to a center tap of the secondary winding, and the secondary winding is coupled across a first wire pair. In this way, differential data and DC power is supplied to the first wire pair. A CMC is connected between the secondary winding and an autotransformer which is also connected across the first wire pair. A center tap of the autotransformer is also connected to the positive voltage output of the power supply, so that the current to the powered device is shared by the isolation transformer and the autotransformer. A similar circuit, with a second PHY, is used for the DC power return path.


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