The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 2020
Filed:
Oct. 16, 2019
Applicant:
Cypress Semiconductor Corporation, San Jose, CA (US);
Inventors:
Kazuhiro Tomita, Kasugai, JP;
Masuo Inui, Aichi, JP;
Assignee:
Cypress Semiconductor Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 15/02 (2006.01); H04L 25/49 (2006.01); H04B 15/00 (2006.01); H04L 7/00 (2006.01); H04B 1/3822 (2015.01); H04L 12/40 (2006.01);
U.S. Cl.
CPC ...
H04B 15/02 (2013.01); H04B 1/3822 (2013.01); H04B 15/005 (2013.01); H04L 7/0012 (2013.01); H04L 7/0037 (2013.01); H04L 12/40006 (2013.01); H04L 25/4902 (2013.01); H04L 25/4906 (2013.01);
Abstract
In an example embodiment, a communication system provides a clock extension peripheral interface (CXPI) communication bus that is coupled to a master node and a plurality of slave nodes. The master node is configured to transmit a reference clock signal on the CXPI communication bus. Each slave node of the plurality of slave nodes is configured to receive the reference clock signal from the CXPI communication bus and to transmit and receive data to and from the CXPI communication bus based on the reference clock signal.