The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 2020
Filed:
Oct. 21, 2019
Applicants:
David L. Whitney, Saratoga, CA (US);
Manuel M. Del Arroz, Diablo, CA (US);
Inventors:
David L. Whitney, Saratoga, CA (US);
Manuel M. Del Arroz, Diablo, CA (US);
Assignee:
Other;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/094 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03K 19/094 (2013.01); H03K 19/20 (2013.01);
Abstract
A logic gate includes at least one reverse direction high-electron-mobility transistor. The reverse direction high-electron-mobility transistor includes at least one source connected to a first reference voltage, at least one gate connected to an output, and at least one drain connected to the output. Logic implementing circuitry is connected between the output an additional reference voltage. The logic implementing circuitry includes a first transistor that includes a gate connected to a first input, and a second transistor that includes a gate connected to a second input.