The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2020

Filed:

May. 15, 2018
Applicant:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Inventors:

Ryo Kanda, Tokyo, JP;

Hitoshi Matsuura, Ibaraki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/08 (2006.01); H01L 29/739 (2006.01); H01L 29/78 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7397 (2013.01); H01L 29/0623 (2013.01); H01L 29/0804 (2013.01); H01L 29/1095 (2013.01); H01L 29/407 (2013.01); H01L 29/66348 (2013.01); H01L 29/0619 (2013.01);
Abstract

In one embodiment, a semiconductor device includes a semiconductor substrate having an upper surface, a trench electrode placed inside a trench formed on the upper surface, and a trench insulating film placed between the trench electrode and the semiconductor substrate, and the semiconductor substrate includes a drift layer, a floating layer for electric field reduction, a hole barrier layer, a body layer and an emitter layer, and the emitter layer, the body layer and the hole barrier layer are separated from the drift layer by the floating layer for electric field reduction, and a path of a carrier passing through an inverted layer formed in the body layer includes the body layer, the hole barrier layer, a non-inverted region of the floating layer for electric field reduction, and the drift layer.


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