The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2020

Filed:

Jun. 05, 2015
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Inventor:

Makoto Kaneyasu, Kanagawa, JP;

Assignee:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); G06F 3/042 (2006.01); G06F 3/044 (2006.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); G06F 3/042 (2013.01); G06F 3/044 (2013.01); G06F 2203/04102 (2013.01); H01L 27/1225 (2013.01); H01L 27/1255 (2013.01);
Abstract

To provide an input device and an input/output device with high detection sensitivity. The input device includes a first transistor, a second transistor, a capacitor, a node, a first wiring, a second wiring, a third wiring, and a fourth wiring. The first transistor includes a first gate and a second gate. The first and second gates of the first transistor overlap with each other with a semiconductor film therebetween. The second gate of the first transistor is electrically connected to the node. The first wiring is electrically connected to the second wiring through the first transistor. The third wiring is electrically connected to the node through the second transistor. A first terminal of the capacitor is electrically connected to the node, and a second terminal of the capacitor is electrically connected to the fourth wiring.


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