The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2020

Filed:

Jan. 18, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Jeremy T. Ekman, West Concord, MN (US);

Donald J. Ziebarth, Rochester, MN (US);

George R. Zettles, IV, Rochester, MN (US);

Trevor J. Timpane, Rochester, MN (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/3183 (2006.01); G06F 11/26 (2006.01); G06F 11/22 (2006.01); H04L 1/00 (2006.01); G06F 13/38 (2006.01); G06F 13/10 (2006.01); H04L 1/18 (2006.01); H04L 29/08 (2006.01); G01R 31/317 (2006.01); H04L 12/26 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318385 (2013.01); G06F 11/221 (2013.01); G06F 11/261 (2013.01); H04L 1/00 (2013.01); G01R 31/31703 (2013.01); G06F 13/10 (2013.01); G06F 13/385 (2013.01); H04L 1/18 (2013.01); H04L 43/50 (2013.01); H04L 69/324 (2013.01);
Abstract

Hardware assisted high speed serial (HSS) transceiver testing including receiving, by a link layer hardware state machine on a HSS transmitting device, an instruction to generate a test pattern, wherein the test pattern comprises a sequence of data units; loading, by the link layer hardware state machine, each unique data unit into embedded random access memory (RAM); generating, by the link layer hardware state machine, the test pattern comprising the sequence of data units using the unique data units stored in the embedded RAM, wherein at least one of the unique data units is repeated in the sequence of data units of the test pattern; and sending, by the link layer hardware state machine, the generated test pattern to an input of a HSS transceiver.


Find Patent Forward Citations

Loading…