The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2020

Filed:

Oct. 26, 2018
Applicant:

Cisco Technology, Inc., San Jose, CA (US);

Inventors:

Biju M. Mammen, Santa Clara, CA (US);

Sundher Narayanaswamy, San Jose, CA (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/18 (2006.01); H04L 29/12 (2006.01); H04L 12/715 (2013.01); H04L 12/933 (2013.01); H04L 12/931 (2013.01); H04L 12/743 (2013.01);
U.S. Cl.
CPC ...
H04L 12/185 (2013.01); H04L 45/64 (2013.01); H04L 45/7457 (2013.01); H04L 49/1507 (2013.01); H04L 49/1515 (2013.01); H04L 49/201 (2013.01); H04L 49/354 (2013.01); H04L 61/2069 (2013.01);
Abstract

Embodiment provide recovering multicast data traffic during spine reload in software defined networks by identifying interfaces available between spine switches and a public network in a site; identifying Group Internet Protocol-outer (GIPo) addresses that handle multicast communications between endpoints associated together in a bridge domain, wherein the endpoints are connected via leaf switches in communication with the spine switches in a Clos topology; assigning each GIPo address to one virtual interface group (ViG) of a plurality of ViGs to generate GIPo-to-ViG mappings; distributing the GIPo-to-ViG mappings to the spine and leaf switches; assigning each ViG to one Interface as first ViG-to-Interface mappings; distributing the first ViG-to-Interface mappings to the spine and leaf switches and; when a number of available Interfaces changes, re-assigning each ViG to one currently-available Interface as second ViG-to-Interface mappings; and distributing the second ViG-to-Interface mappings to the spine switches and to the leaf switches.


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