The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2020
Filed:
Apr. 23, 2018
University of Electronic Science and Technology of China, Chengdu, CN;
Yujian Cheng, Chengdu, CN;
Yichen Zhong, Chengdu, CN;
Renbo He, Chengdu, CN;
Yan Liu, Chengdu, CN;
Yong Fan, Chengdu, CN;
Kaijun Song, Chengdu, CN;
Bo Zhang, Chengdu, CN;
Xianqi Lin, Chengdu, CN;
Yonghong Zhang, Chengdu, CN;
UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA, Chengdu, CN;
Abstract
An antenna for generating an arbitrarily directed Bessel beam, including a beam-forming plane and a feeding horn, the beam-forming plane is a dual-layer dielectric substrate structure having a beam focusing function, including: a printed circuit bottom layer, a high-frequency dielectric substrate lower layer, a printed circuit middle layer, a high-frequency dielectric substrate upper layer, and, a printed circuit upper layer; the printed circuit bottom layer, the high-frequency dielectric substrate lower layer, the printed circuit middle layer, the high-frequency dielectric substrate upper layer, and the printed circuit upper layer are co-axially stacked from the bottom to the top: the beam-forming plane is entirely divided into periodically arranged beam-forming units by a plurality of meshes, and each beam-forming unit consists of printed circuit upper, middle and lower metal patches of which centers are on the same longitudinal axis, the high-frequency dielectric substrate lower layer and the high-frequency dielectric substrate upper layer.