The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2020

Filed:

Aug. 27, 2018
Applicant:

Joled Inc., Tokyo, JP;

Inventors:

Atsuhito Murai, Tokyo, JP;

Yasuhiro Terai, Tokyo, JP;

Takashi Maruyama, Tokyo, JP;

Yoshihiro Oshima, Tokyo, JP;

Motohiro Toyota, Tokyo, JP;

Ryosuke Ebihara, Tokyo, JP;

Yasunobu Hiromasu, Tokyo, JP;

Assignee:

JOLED INC., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/32 (2006.01); H01L 51/52 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3276 (2013.01); H01L 27/3262 (2013.01); H01L 27/3265 (2013.01); H01L 29/41733 (2013.01); H01L 29/42384 (2013.01); H01L 29/78633 (2013.01); H01L 51/5246 (2013.01); H01L 27/1225 (2013.01); H01L 27/1244 (2013.01); H01L 27/1255 (2013.01); H01L 29/7869 (2013.01); H01L 2251/5392 (2013.01);
Abstract

A display unit includes a first substrate, a transistor, first and second wiring layers, and an insulating film. The first substrate is provided with a display region and a peripheral region. The transistor is provided in the display region, and includes a semiconductor layer, a gate electrode facing the semiconductor layer, a gate insulating film between the gate electrode and the semiconductor layer, and a source-drain electrode electrically coupled to the semiconductor layer. The first wiring layer is provided in the peripheral region, electrically coupled to the transistor, and disposed closer to the first substrate than the same layer as the gate electrode and the source-drain electrode. The second wiring layer is provided on the first substrate and has an electric potential different from the first wiring layer. The insulating film is provided between the second wiring layer and the first wiring layer.


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