The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2020

Filed:

Jul. 13, 2017
Applicant:

Rockley Photonics Limited, London, GB;

Inventors:

John Drake, St. Ives, GB;

Damiana Lerose, Pasadena, CA (US);

Henri Nykänen, Helsinki, FI;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); G02B 6/136 (2006.01); G02B 6/13 (2006.01); H01L 21/8258 (2006.01); G02B 6/12 (2006.01); G02B 6/30 (2006.01); G02B 6/42 (2006.01); G02B 6/122 (2006.01); H01L 21/762 (2006.01); G02B 6/132 (2006.01); G02B 6/134 (2006.01); H01S 5/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823821 (2013.01); G02B 6/12 (2013.01); G02B 6/131 (2013.01); G02B 6/136 (2013.01); G02B 6/305 (2013.01); H01L 21/8258 (2013.01); G02B 6/12004 (2013.01); G02B 6/1223 (2013.01); G02B 6/132 (2013.01); G02B 6/1347 (2013.01); G02B 6/42 (2013.01); G02B 2006/121 (2013.01); G02B 2006/12038 (2013.01); G02B 2006/12061 (2013.01); G02B 2006/12097 (2013.01); G02B 2006/12147 (2013.01); G02B 2006/12152 (2013.01); G02B 2006/12176 (2013.01); G02B 2006/12178 (2013.01); G02B 2006/12195 (2013.01); H01L 21/7624 (2013.01); H01L 21/76224 (2013.01); H01L 21/76264 (2013.01); H01S 5/021 (2013.01); H01S 5/0216 (2013.01);
Abstract

An optical mode converter and method of fabricating the same from wafer including a double silicon-on-insulator layer structure. The method comprising: providing a first mask over a portion of a device layer of the DSOI layer structure; etching an unmasked portion of the device layer down to at least an upper buried oxide layer, to provide a cavity; etching a first isolation trench and a second isolation trench into a mode converter layer, the mode converter layer being: on an opposite side of the upper buried oxide layer to the device layer and between the upper buried oxide layer and a lower buried oxide layer, the lower buried oxide layer being above a substrate; wherein the first isolation trench and the second isolation trench define a tapered waveguide; filling the first isolation trench and the second isolation trench with an insulating material, so as to optically isolate the tapered waveguide from the remaining mode converter layer; and regrowing the etched region of the device layer.


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