The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2020
Filed:
Mar. 26, 2018
Infineon Technologies Ag, Neubiberg, DE;
Nirdesh Ojha, Villach, AT;
Francisco Javier Santos Rodriguez, Villach, AT;
Infineon Technologies AG, Neubiberg, DE;
Abstract
A method of structuring and/or thinning a semiconductor wafer having a plurality of functional chip sites includes forming one or more semiconductor devices in a device region of each functional chip site at a frontside of the semiconductor wafer, and forming an electrode at one of the frontside or a backside of the semiconductor wafer. The side of the semiconductor wafer at which the electrode is formed is structured by applying voltage pulses between the electrode and a tool electrode positioned above the semiconductor wafer as part of an electrical discharge machining (EDM) process before the electrode is removed by the EDM process, and between the tool electrode and an intrinsic conductive layer formed on the side of the semiconductor wafer being structured after the electrode is removed by the EDM process.