The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2020

Filed:

Feb. 14, 2019
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventor:

Yusuke Umezawa, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 16/34 (2006.01); G11C 16/10 (2006.01); G11C 16/04 (2006.01); G11C 11/56 (2006.01); H01L 27/1157 (2017.01); H01L 27/11519 (2017.01); H01L 27/11565 (2017.01); H01L 27/11524 (2017.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/10 (2013.01); G11C 11/5628 (2013.01); G11C 11/5671 (2013.01); G11C 16/0483 (2013.01); H01L 27/1157 (2013.01); H01L 27/11519 (2013.01); H01L 27/11524 (2013.01); H01L 27/11565 (2013.01);
Abstract

At a time of writing first data to a first memory cell, second data which is written later to an adjacent second memory cell is referred to, and when a value of the second data corresponds to a first threshold level, a verify voltage is set to a first verify voltage, and when the value of the second data corresponds to a second threshold level greater than the first threshold level, the verify voltage is set to a second verify voltage smaller than the first verify voltage.


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Umezawa, Yusuke. (2020). Semiconductor memory device (U.S. Patent No. 10643723). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10643723

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