The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2020
Filed:
Jul. 25, 2017
Applicant:
Western Digital Technologies, Inc., San Jose, CA (US);
Inventors:
Thibash Rajamani, Bangalore, IN;
Ramesh Chander, Bangalore, IN;
Manavalan Krishnan, Fremont, CA (US);
Brian O'Krafka, Austin, TX (US);
Nagi Reddy Chodem, Bangalore, IN;
Assignee:
Western Digital Technologies, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G06F 12/0817 (2016.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01); G06F 12/06 (2006.01);
U.S. Cl.
CPC ...
G11C 16/105 (2013.01); G06F 3/061 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 12/0246 (2013.01); G06F 12/0817 (2013.01); G06F 12/0623 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7203 (2013.01);
Abstract
An apparatus includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller is configured to receive a command from a device to perform a write operation at the non-volatile memory. The command indicates a plurality of logical addresses, data associated with the plurality of logical addresses, and a number of write operations associated with the command.