The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2020

Filed:

Jul. 12, 2018
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Minho Lee, Paju-si, KR;

Seunghee Kuk, Paju-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/32 (2016.01); G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/3233 (2013.01); G09G 2300/0819 (2013.01); G09G 2310/0286 (2013.01);
Abstract

A gate driver and a display device including the same are disclosed. The gate driver includes a plurality of stages. Each stage includes a transistor Toutputting an emission signal of a gate-on voltage to a node Na while a node Q is activated, a transistor Toutputting the emission signal of a gate-off voltage to the node Na while a node QB is activated, a Q controller controlling a voltage of the node Q depending on a clock signal ECLKand a clock signal ECLKthat are in antiphase, and a voltage of a node Q', a QB controller controlling a voltage of the node QB depending on the clock signal ECLK, the voltage of the node Q, and the voltage of the node Q′, and a capacitor CQ connected between an input terminal of the clock signal ECLKand the node Q.


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