The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2020
Filed:
Jun. 18, 2018
Applicant:
Mellanox Technologies, Ltd., Yokneam, IL;
Inventor:
David M. Wentzlaff, Princeton Junction, NJ (US);
Assignee:
Mellanox Technologies Ltd., Yokneam, IL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 13/40 (2006.01); G06F 3/06 (2006.01); G06F 15/173 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4022 (2013.01); G06F 3/061 (2013.01); G06F 3/0656 (2013.01); G06F 3/0673 (2013.01); G06F 13/1673 (2013.01); G06F 13/4291 (2013.01); G06F 15/17337 (2013.01); G06F 15/17343 (2013.01);
Abstract
The flow of data in an integrated circuit is controlled. The integrated circuit comprising a plurality of tiles, each tile comprising a processor, a switch including switching circuitry to forward data over data paths from other tiles to the processor and to switches of other tiles, and a receive buffer to store data from the switch. At a first tile, a count is maintained of data that has been sent to a second tile without receiving an acknowledgement up to a credit limit. At the second tile, data that arrives from the first tile when the receive buffer is full is sent to a memory outside of the tile.