The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2020

Filed:

Jun. 28, 2018
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Darrell D. Boggs, Hillsboro, OR (US);

Ross Segelken, Portland, OR (US);

Mike Cornaby, Hillsboro, OR (US);

Nick Fortino, San Jose, CA (US);

Shailender Chaudhry, Santa Clara, CA (US);

Denis Khartikov, Beaverton, OR (US);

Alok Mooley, Daly City, CA (US);

Nathan Tuck, Corvallis, OR (US);

Gordon Vreugdenhil, Tigard, OR (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0875 (2016.01); G06F 9/38 (2018.01); G06F 12/0888 (2016.01); G06F 12/0811 (2016.01); G06F 12/1027 (2016.01); G06F 12/1009 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0875 (2013.01); G06F 9/3842 (2013.01); G06F 12/0811 (2013.01); G06F 12/0888 (2013.01); G06F 12/1009 (2013.01); G06F 12/1027 (2013.01); G06F 2212/1052 (2013.01); G06F 2212/452 (2013.01); G06F 2212/507 (2013.01); G06F 2212/653 (2013.01);
Abstract

An improved architectural means to address processor cache attacks based on speculative execution defines a new memory type that is both cacheable and inaccessible by speculation. Speculative execution cannot access and expose a memory location that is speculatively inaccessible. Such mechanisms can disqualify certain sensitive data from being exposed through speculative execution. Data which must be protected at a performance cost may be specifically marked. If the processor is told where secrets are stored in memory and is forbidden from speculating on those memory locations, then the processor will ensure the process trying to access those memory locations is privileged to access those locations before reading and caching them. Such countermeasure is effective against attacks that use speculative execution to leak secrets from a processor cache.


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