The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2020

Filed:

May. 25, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventor:

Hee Dong Shin, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 9/44 (2018.01); G06F 1/3287 (2019.01); G06F 9/4401 (2018.01); G06F 13/24 (2006.01); G11C 7/10 (2006.01); G11C 11/406 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 9/4401 (2013.01); G06F 9/4408 (2013.01); G06F 9/4418 (2013.01); G06F 13/24 (2013.01); G11C 7/1072 (2013.01); G11C 11/40615 (2013.01); Y02D 10/171 (2018.01);
Abstract

A system on chip (SoC) includes an internal read-only memory (ROM) configured to store a first boot loader; a first internal static random access memory (SRAM) configured to receive a second boot loader output from a booting device, store the second boot loader, and perform a booting sequence according to control of the first boot loader; a second internal SRAM configured to receive a third boot loader output from the booting device, store the third boot loader, and perform a wake-up sequence according to control of the first boot loader; and a dynamic random access memory (DRAM) controller configured to load an operating system (OS) from the booting device into a DRAM according to control of the second boot loader.


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