The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2020

Filed:

Jun. 13, 2018
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, KR;

Inventors:

Gyu Won Kim, Suwon-si, KR;

Kyoung Joong Min, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 (2006.01); G02B 7/04 (2006.01); H04N 5/232 (2006.01); G02B 7/10 (2006.01); G02B 7/09 (2006.01); G03B 3/10 (2006.01); G03B 5/00 (2006.01); G02B 27/64 (2006.01); G02B 7/08 (2006.01);
U.S. Cl.
CPC ...
G02B 7/102 (2013.01); G02B 7/09 (2013.01); G03B 3/10 (2013.01); G03B 5/00 (2013.01); H04N 5/23227 (2018.08); H04N 5/23258 (2013.01); H04N 5/23287 (2013.01); G02B 7/08 (2013.01); G02B 27/646 (2013.01); G03B 2205/0053 (2013.01); H03M 1/1245 (2013.01);
Abstract

An analog-digital converter (ADC) module includes: an ADC configured to convert an analog signal into digital data according to a control signal; and an ADC controller configured to receive a mode selection signal setting the ADC controller in one of a plurality of modes, output the control signal to the ADC, and receive the digital data from the ADC. The ADC controller repeatedly outputs the control signal to the ADC using a timer, and stores the digital data in a register in response to an end of conversion (EOC) signal from the ADC, in a first mode. The ADC controller outputs the control signal to the ADC in response to an instruction signal, stores the digital data in the register in response to the EOC signal being input from the ADC, and outputs an interrupt signal to the ADC in response to the digital data being stored in the register, in a second mode.


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