The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2020

Filed:

Dec. 31, 2018
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Min-Seok Shin, Yongin-si, KR;

Hoe-Sam Jeong, Seoul, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/3745 (2011.01); G11C 7/22 (2006.01); H04N 5/378 (2011.01); H04N 5/357 (2011.01); H04N 5/355 (2011.01);
U.S. Cl.
CPC ...
H04N 5/3745 (2013.01); G11C 7/222 (2013.01); H04N 5/355 (2013.01); H04N 5/3575 (2013.01); H04N 5/378 (2013.01);
Abstract

A data readout apparatus may include a comparison circuit structured to compare a pixel signal with the ramp signal to generate a comparison result, a counter array structured to receive the comparison results to count up with each clock pulse from a first timing until a second timing to convert a counted number of clock pulses into differential data and output the differential data through differential data lines, and a sense amplifier array structured to receive the differential data to sense and amplify the differential data based on a judge clock. The sense amplifier array can include a replica delay structured to delay the judge clock and the precharge pulse signal based on a read out timing and read out the data from the counter array at the read out timing.


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